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Verification Engineer Resume Samples
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0-5 years of experience
Executed and documented results of On Board Diagnostics II (OBD) verification tests for V6 90 degree engines using several programs and databases such as SCADA. Responsible for resolving any open OBD II issues and document closure.
- Developed and implemented a verification test matrix for the V6 engine applications that was used for future vehicle launches.
- Identified several ride quality issues during verification trips to ensure that vehicles’ diagnostics were operating properly.
- Improved open diagnostic issue resolution by 10% over two years.
- Executed 100% to target tests and verification of powertrain.
0-5 years of experience
Architected and built a simulation environment from the ground up that was adopted for testing and verification of SPARC T4 microprocessor by multiple hardware teams
- Analyzed regression test suites and optimized them effectively
- Hosted weekly meetings with the team to ascertain scheduling, track status, issues, and coordinate roles
- Successfully led and delivered hardware design for the next generation SPARC microprocessor to product release on schedule
- Developed product engineering requirements documents for utilization by various teams
- Coordinated with engineers and architects to ensure product features and functionalities met requirements
0-5 years of experience
Designed, developed and led verification of three FPGAs for the two [company name] Clearpath “top of the line” Enterprise Servers. Architectures included two [company name] processors, DDR3, LVDS, PCIE, proprietary Caching and crossbar, and maintenance I2C.
- Completed goals of design and verification on time and under budget. Verified block level, FPGAs, board level, and multi-board level.
- Increased test writing productivity by 20%. Created automatic initialization, programmable initialization, self updating, low maintenance code. Used intelligent hardware models.
- Laid the foundation for scheduling people and machines by writing the simulation verification test-plan for the project. Documented the tools, methods, test areas, test benches, and test cases for over 80 people at two sites.
- Leveraged best practices. Wrote four design guides by Platform and Language. Documented the latest rules and methods for design entry and simulation. Unix based, TCL, Verilog, and windows.
- Maximized team potential through guidance and training.
0-5 years of experience
Designed, implemented, and managed timing sensitive automated test suites for multiple complex algorithms and features
- Gained domain knowledge and provided input on analyzing root cause issues from regression runs and improving tests to other team members for their features.
- Ported assigned features to new test setup while also improving stability of the tests by 25%.
- Improved Visual Basic tool and updated SQL queries to extract and add regression run results to tests database.
- Partnered with engineer and ported entire suite of tests from Borland C++ to Visual C++.
0-5 years of experience
Designed, developed, and deployed automated test stations, performed RF parametric tests on mobile phones, assisted in the carrier acceptance process, and wrote detailed test plans and technical reports.
- Executed AMPS and CDMA RF parametric tests and prepared technical reports containing the results and potential risks to mobile phone projects.
- Automated test systems to perform AMPS, CDMA, and CDMA2000 parametric tests on mobile phones.
- Prepared the Transceiver Department as Object Leader for the first Ericsson CDMA2000 phone.
- Performed antenna pattern measurements and participated in mobile field testing in top US cellular markets as part of carrier acceptance processes for Verizon, MetroPCS, and Sprint.
0-5 years of experience
Worked in VLSI group on one of the IP block which is developed by [company name].
- This ASIC is a Host Controller which supports both Fiber Channel and Serial Attached SCSI (SAS).
- The Host Controller is designed in a modular fashion to allow the blocks to be configured as stand-alone on an ASIC bridge which will be used is SATA disk drives.
- Responsibilities included testing and verified the functionality of this block.
- Wrote test plans, executed test cases, reported bugs and worked with developers to resolve problems.
- Created scripts for automation and executed regression tests and used ModelSim Code Coverage to get the overall coverage.
- Worked with RTL owner to fix the bugs and verified the fixes.
6-10 years of experience
Leading a small team of Verification Engineers through the development and tape out process of the IBM Power chip families.
- Developed verification test plan for the chip and release criteria.
- Responsible for the logic chip verification, and extensive problem debugging, issues tracking, problem resolution, promotions and releases of the chip VHDL along with the simulation environment for the chip and system verification
- Recruited candidates for the verification team. Mentored new team members on IBM validation tools and verification methodologies.
- Architected, implemented, and maintained verification environments in C++ for the FPU and FXU units.
- Developed C++ Behavioral Models, Checkers, Monitors, and Irritators for Unit Simulation Environment for Floating Point Unit and the Fixed Point Unit.
- Created and executed directed and random verification test plans for FXU and FPU units for single and multi-processor (MP) system configurations.
- Debugged test fails at unit, full chip and system level (multi-processor).
0-5 years of experience
Discovered a software issue that deactivated audible alarms.
- Received two awards: one for high impact overall contribution and the second for Adaptability, Leadership, and Creative solutions.
- Wrote, reviewed, and verified test protocols that verify the software and electrical and mechanical systems of our anesthesia machines.
- Performed manual and automated (Monte Carlo simulation, reboot testing) verification of anesthesia device software and electromechanical systems.
- Worked with a fellow consultant to rewrite most of the training material for the anesthesia team to be up to date with the current devices.
- Trained numerous co-op students and consultants as they were on-boarded.
- Recommended and assisted in recruiting a team member as a contractor who was ultimately brought on as a FTE.
0-5 years of experience
Lead a team of three to plan and execute development of Surface and accessories including system integration with Windows 8 apps. Influence cross-functional disciplines such as Marketing, Product Planning, Program management, Software, Manufacturing and hardware through deep technical knowledge and business understanding.
- Negotiated deals with vendors and equipment manufacturers to reduce FY13 CAPEX spend for the organization.
- Defined key requirements for User experience team for usability studies and for market analysis.
- Partnered with Windows 8 app team on development of Camera app available in Windows 8 and Surface.
- Collaborated with Windows Media Platform team and Lync team to support their development for Windows 8.
- Strategized and executed a smooth transition of the program to MACH, China (Microsoft Asia Center for Hardware).
- Developed and executed strategies that improved quality of webcam testing.
0-5 years of experience
Verified and debugged SoC portion of ARM7TDMI based design, for Bluetooth applications. Wrote test cases in C, C++, Verilog HDL and Vera to test at both chip and module level. Ran simulations to verify functionality at both rtl and gate level.
- Ran gate level simulations with post layout timing information to verify timing.
- Developed monitors in Verilog HDL to track uniformity of flash access lengths and also relationships between clocks in the background.
- Wrote test plan and test cases focused on thoroughly testing the DMA-UART-Buffer Access Controller working in a Vera environment. Implemented Vera test bench for random testing.
- Wrote detailed test plan and test cases to test System Timer. Generated and simulated with ATPG scan vectors. Generated code coverage information using Coverscan.
0-5 years of experience
Lead design verification of NAND flash memory controller SoCs used in Sandisk’s flash memory cards and SSDs.
- Created comprehensive verification plan and strategy for on-time delivery of high quality SoCs. Developed and managed verification schedules, milestones and deliverables according to the project’s requirements.
- Managed a global team of 4 to 8 verification engineers for each project.
- Executed verification plan from inception to completion making sure it achieved 100% code coverage.
- Interfaced with cross-functional teams (Design, Verification, FPGA, Physical Design and Firmware) to resolve any issues blocking product delivery.
- On top of planning and leading verification effort, performed hands on coding, debugging, test plan development and test automation.
- All issues found during verification were tracked to completion using JIRA issue tracker tool.
- Made sure the project is verified to the highest quality standards by driving the team to use best in class verification methods and tools through evaluation and deployment of new vendor tools and products.
- Hired and mentored new team members.
6-10 years of experience
Perform product test verification for CDG1 & CDG2 lab entry criteria for IS95 and CDMA2000 mobile handsets.
- Performed testing for CDG2 that met entrance criteria for IOT and CTIA Labs test certifications.
- Developed and Executed Test plans that identified and troubleshot issues before lab entry submittals or during product customer acceptance, including CTIA, FCC/IC, NAL for China Unicom and ANATEL for Vivo in Brazil.
- Utilized standard reports (Engineering and Factory) to provide feedback to R&D programs to resolve any open issues.
- Implemented and tested Audio/Acoustic.
- Optimized rack performance by eliminating calibration failures and increasing measurements accuracy.
- Correlated test equipment and requirements with external Labs such as Verizon, Sprint, Alltel and USCellular among others, resulting in more reliable results.
- Instructor at Electronic Engineering School for the following subjects, Engineering Circuit Analysis, Calculus and Autocad Rel. 12.
0-5 years of experience
- Volunteered to take ownership in creating a pre-Si verification environment, using C++, for an Intel IP codename Crystal Beach DMA engine (v1.1), one of the major block for the project Clarksboro.
- Re-designed the CBDMA verification environment for Tylersburg project to support the updated version 3.3
- Wrote verification test plans for both Clarksboro and Tylersburg projects
- Mentored a junior engineer during the pre-A0 milestone of Tylersburg
- Volunteered to help out in reproducing the 3 critical design bugs found by post-Si team affecting another Intel IP (VT-d, Virtualization Technology for Directed I/O) block. The expedited works in reproduction of the bugs helped the company to avoid a delay in PRQ.
- Joined Jaketown at a later stage of the project, created a Perl script to generate test patterns for CBDMA for use in the emulation environment to fill up a coverage
0-5 years of experience
Systems engineering and subsequent system verification of the Cougar advanced, multi-rack, shelterized signal processor sub-element.
- LabVIEW and LabWindows (writing C code) to automate RF/IF test equipment control and data collection (Spectrum Analyzers, Arbitrary Waveform Generators, Oscilloscopes, Power Meters, Frequency Counters).
- Wrote test plans, integration procedures, and design verification procedures.
- Developed and performed the design verification procedures for the Signal Acquisition and Simulation test cases.
- Integrated software threads with hardware.
- Allocated system specifications to Integrated Product Teams (IPTs).
- Created MS Access database to track sub-element requirements and issues. This data was used in preparation of Preliminary Design Review (PDR) and Critical Design Review (CDR) charts, incorporated into Sub-System Design Documents, use-case, test plan, and test procedure documents.
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Verification Engineer
Last edited by: Gabriela Barcenas, CONTENT STRATEGIST -
Gabriela Barcenas
CONTENT STRATEGISTGabriela is a Certified Professional Resume Writer (CPRW) and career adviser. With 10 years of digital media experience and five years of resume writing expertise, her publication history includes fashion, education, travel, social justice, equitable design and career advice.
